Design of Bandgap Core and Startup Circuits for All CMOS Bandgap Voltage Reference

This paper proposes a new self-biased op-amp’s startup circuit design and improved bandgap core circuit for all CMOS bandgap voltage reference (BGR). In a conventional BGR circuit, the startup circuit may be designed either be required an external power on reset signal (POR) or composed of several MOS transistors for generating bias current and the bandgap core circuits has two nodes that are controlled currents and voltages by resistors of the same value. The new startup circuit presented here is designed by using only one NMOS transistor with circuit solutions suitable for low supply-voltage operation and achieved the correct bias point stability at the power on and the bandgap core circuit is defined the currents and voltages only one node which can be controlled by input voltages definition of op-amp are equalized for reducing the number of resistor. The simulation results indicate reference voltage of about 500.2 mV, temperature coefficient(TC) of 5ppm/°C, which can be successfully operated with a minimum power supply of 1.2V at a temperature of 0-100°C and a total power dissipation of 10.7 W at room temperature. Streszczenie. W artykule zaproponowano nowe możliwości projektowania CMOS pasmowych wzorców napięcia. W obwodach konwencjonalnych wymaga ne jest użycie zewnętrznego sygnału resetu albo użycie kilku tranzystorów MOS generujących prąd polaryzacji. W nowej koncepcji wykorzystywane są tylko tranzystory NMOS co umożliwia pracę przy niskim napięciu zasilającym. (Projektowanie pasmowego rdzenia i obwodu startowego pasmowych źródeł napięcia referencyjnego)